1. Field of Invention
The present invention relates to a package and method of manufacturing the same. More particularly, the present invention relates to a chip package and method of manufacturing the same.
2. Description of Related Art
Demand of better device function is increasing, and the semiconductor chip package industry also thrives to meet the target. Device is much more compact and at the same time having multiple functions. The semiconductor chip packaging technique has to advance so as to achieve the requirement. Wafer-level chip packaging is a type of semiconductor chip packaging. It refers to a method which packages and tests all the chips on the wafer after the chips are completed. Then the chips are separated by cutting to a single chip.
As previously mentioned, the semiconductor chip design is more complex due to downsizing and multi-function. As a result, manufacturing process is more difficult for producing the semiconductor chips, and cost increases. In addition, production yield is prone to a lower rate. Also, a single chip package has to be combined with other chip package or circuit board or other electronic components, and therefore it requires a careful design for the sake of further processing.
Accordingly a chip package that is reliable, has lower production cost, and can be easily combined with other electronic components is the major concern in the field.